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Barst
2.0
A server that controls lab hardware.
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Barst
2.0
A server that controls lab hardware.
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#include <cpl defs.h>
Public Attributes | |
| float | fUSBBuffToUse |
| DWORD | dwDataPerTrans |
| unsigned char | ucClk |
| unsigned char | ucLowestDataBit |
| unsigned char | ucDataBits |
| unsigned char | ucRateFilter |
| bool | bChop |
| bool | bChan1 |
| bool | bChan2 |
| unsigned char | ucInputRange |
| unsigned char | ucBitsPerData |
| bool | bStatusReg |
| bool | bReverseBytes |
| bool | bConfigureADC |
Initialization struct to create an FTDI device which provides access to the CPL ADC device.
Definition at line 311 of file cpl defs.h.
| bool SADCInit::bChan1 |
If channel 1 in the ADC device is read.
Definition at line 349 of file cpl defs.h.
| bool SADCInit::bChan2 |
If channel 2 in the ADC device is read.
Definition at line 351 of file cpl defs.h.
| bool SADCInit::bChop |
Whether chopping mode (noise reduction is active).
Definition at line 347 of file cpl defs.h.
| bool SADCInit::bConfigureADC |
Whether we configure the ADC before reading.
Definition at line 369 of file cpl defs.h.
| bool SADCInit::bReverseBytes |
Sets how the ADC is connected to the USB bus. Currently, in Alder board this must be true. This indicates that the data pins on the USB bus are flipped relative to the ADC pins. I.e. pin 7 connects to pin 0 etc.
Definition at line 367 of file cpl defs.h.
| bool SADCInit::bStatusReg |
True if we should read the status register from the ADC device. The status register helps us determine if errors occured. If bChan2 is true, this also MUST be true. This should be true.
Definition at line 363 of file cpl defs.h.
| DWORD SADCInit::dwDataPerTrans |
This parameter gives you control over how often the ADC sends the data read to the device that triggered it. The device will wait until dwDataPerTrans data points for each channel (if the second channel is active) has been accumilated and than send eactly dwDataPerTrans (for each channel) data points to the client.
Definition at line 331 of file cpl defs.h.
| float SADCInit::fUSBBuffToUse |
When communicating with the ADC device we continueously read/write to it. The larger the buffer we write/read at once the faster it preforms. For instance, for fastest communication we would write in buffer mutliples of FTDI_MAX_BUFF_H/L. Because each USB bus can be used for multiple devices, if we were to write in multiples of FTDI_MAX_BUFF_H/L then although it'd be most efficient for the ADC device, during this write/read other devices of this bus will have to wait until we are finished writing this buffer and we want to write again to be able to update the output buffer to write to their device. This means, the larger the buffer the more we have to wait between writes to other devices. Although each write/read from a device gets its own timestamp when it occured so that we still know when that occured, the write occur with less frequency. fUSBBuffToUse tells us the percentage (0-100) of FTDI_MAX_BUFF_H/L to use for ADC r/w. The smaller this is, the faster other devices will be able to update, but might reduce the ADC bit rate.
Definition at line 326 of file cpl defs.h.
| unsigned char SADCInit::ucBitsPerData |
The bit depth of the ADC data read. It's either 16 or 24.
Definition at line 359 of file cpl defs.h.
| unsigned char SADCInit::ucClk |
defines which pin in the USB bus is the clock pin to the ADC.
Definition at line 333 of file cpl defs.h.
| unsigned char SADCInit::ucDataBits |
Indicates the number of bits connected to the ADC data port. Range is [0, 6] 0 indicates 2 bits are connected, while 6 indiactes the full port, 8 bits are connected.
Definition at line 340 of file cpl defs.h.
| unsigned char SADCInit::ucInputRange |
The voltage input range of the active channels. 0: +/- 10V. 1: 0 - 10V. 2: +/- 5V. 3: 0 - 5V.
Definition at line 357 of file cpl defs.h.
| unsigned char SADCInit::ucLowestDataBit |
Defines which pins on the USB bus are data pins. The data pins always start from pin 7 and go until an even number - e.g. 6 (data is pins 6, and 7), or 4 (data is pins 4, 5, 6, and 7). Currently, in Alder board this must be 4.
Definition at line 337 of file cpl defs.h.
| unsigned char SADCInit::ucRateFilter |
The adc samplig rate in Hz is MCLK/(ucRateFilter*A + B) Where MCLK is the crytal resonator frequency (6MHz for the ADC Board). If bChop is true, A is 128, ucRateFilter can range between 2 to 127 inclusive, and B is 249 if bChan2 and bChan1 are true, otherwise it's 248. If bChop is false, A is 64, ucRateFilter can range between 3 to 127 inclusive, and B is 207 if bChan2 and bChan1 are true, otherwise it's 206.
Definition at line 345 of file cpl defs.h.
1.8.13